深圳·新普京888.3(娱乐)APP平台-智库百科 NO.1

• 32-bit high-performance Cortex-M4F core

• Operating frequency:120MHz

• Supporting DSP instructions

• Supporting single-precision floating-point unit (FPU)

• Memory protection unit (MPU)

• 16KB Cache

• External bus supports 8bit/16bit/32bit access

• Supporting hardware-secure access control for peripheral components

• Nested Vectored Interrupt Controller (NVIC): low-latency, low-jitter interrupt response

• Low power consumption with high performance

• 224K bytes of SRAM + 32K bytes of TCM SRAM

• 24K bytes of ROM

• 24K bytes of ROM

• DMA/EDMA

• Timers(2*PIT32bit)

• Watchdog(WDT)

• Time Counter (TC)

• Real-Time Clock (RTC)

• Nested Vectored Interrupt Controller (NVIC)

●  Asymmetric algorithms

     - 1024bit RSA

     - 2048bit RSA

     - 256bit SM2 prime field

●  Symmetric algorithms

     -  DES/3DES supports ECB/CBC mode

     - AES supports ECB/CBC/CTR mode 

     - SM4 supports ECB/CBC mode

●  Hashing algorithms

     - SM3

     - SHA-0/ SHA-1/ SHA-224/ SHA-256/ SHA-384/ SHA-512

●  CRC

     - Supporting CRC32/ CRC16/ CRC8

     - Supporting DMAC operation

●  Memory protection mechanism

     - Application-oriented memory partitioning with hardware support for secure isolation

     - Scrambling bus

●  True  random number generator, compliant with FIPS 140-2 standards and national commercial cryptography standards

• Voltage detection unit

• Light detection unit

• Power supply burr detection unit

• Metal shielding protection

• Temperature detection unit

• Frequency detection unit

• Clock and reset pulse filtering

• Optimizing wire routing for security

• Supporting 128 Byte NVSRAM

• Supporting 4 pairs of open cover detection signals, configured with dynamic/static detection mode

• Supporting voltage detection

• Supporting temperature detection

• Supporting self-destruct and clear NVSRAM

• Each product has a unique serial number

• Main power input voltage: 1.62V~5.5V, PCI domain input voltage: 1.9V~3.63V

• Built-in LDO power output

• Typical power consumption: 120uA/MHz

• Static power consumption: 0.3uA

• Supporting internal power-on reset and external reset

• 32-bit RISC core CS0 with highly optimized 3-stage pipeline

• Operating frequency: 8MHz

• Supporting byte, half-word, and word memory access

• Supporting interrupt nesting

• Fully static design to reduce power consumption

• 4K bytes of SRAM

• Watchdog timer (WDT)

• Time counter (TC)

• Independent input voltage: 1.62V~5.5V

• Typical power consumption: 50uA/MHz

• Static power consumption:0.3uA5

• Level II of security chip for commercial crypto product certification

• EAL5+ of China Cybersecurity Review Technology and Certification Center

• Terminal Chip Security Assessment (compliant with PCI 6.0)